- As part of a multidisciplinary team, you will contribute to physical layout floor plan of various memory chip circuit blocks, and perform block level layout, LVS/DRC verification and using other CAD tools to check layout.
- Of course, you will also work closely with Micron's various design teams in US and other countries and leverage vast resources available throughout Micron’s global sites.
- Additionally, you will perform verification (LVS/DRC etc.) of layout to the full-chip level, and assist in project tape out.
Required Skills and Abilities
- College degree (or above) in Integrated Circuit Design and Electrical Engineering or other related engineering field.
- Willing to develop his/her future career in IC layout.
- Hands-on and willing to learn.
- Familiar with Cadence OA and Calibre verification tools is a plus.
- Understanding of basic CMOS circuits is a plus.
- Score requirement: - passed all the tests not including makeup score.
- English language skill in writing and speaking.
- CET4 score above 425 is a plus.
- Has good communication and team work spirit.
- Job type:Internships
- Closing Date:25th Jan 2019, 6:00 pm